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S6B0086
80 CH SEGMENT / COMMON DRIVER FOR DOT MATRIX LCD
June. 2000. Ver. 0.0
Contents in this document are subject to change without notice. No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express written permission of LCD Driver IC Team.
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
INTRODUCTION
The S6B0086 is an LCD driver LSI which is fabricated by low power CMOS high voltage process technology. In segment driver mode, it can be interfaced in 1-bit serial or 4-bit parallel method by the controller. In common driver mode, dual type mode is applicable. And in segment mode application, the power down function reduces power consumption.
FEATURES
* * * * * * * Power supply voltage: + 5V 10 %, + 3V 10% Supply voltage for display: 6 to 28V (VDD-VEE) 4-bit parallel / 1-bit serial data processing (in segment mode) Single mode operation / dual mode operation (in common mode) Power down function (in segment mode) Applicable LCD duty: 1/64 - 1/256 Interface DRIVERS COM (cascade) S6B0086 High voltage CMOS process Bare die or TCP available SEG (cascade) S6B0086
* *
2
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
TCP
N C
N C
N C
S C 8 0
S C 7 9
S C 7 8
S C 7 7
S C 7 6
S C 7 5
S C 7 4
----------------
S C 7
S C 6
S C 5
S C 4
S C 3
S C 2
S C 1
N C
N C
N C
S6B0086
E R B
V E E
V 5
V 4 3
V 1 2
V 0
C S
M
D I S P 0 F F B
V D D
S H L
V S S
D 4 D R
D 3 D M
D 2 D L
D 1 S I D
C L 2
A M S
C L 1
E L B
#1
#20
* Package Type = 100-TCP-35mm * Input Lead Pitch = 0.80mm * Output Lead Pitch = 0.22mm
3
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
PAD DIAGRAM (S6B0086 / S6B0086 TCP)
1 SC51 100 SC50 99 SC49 98 SC48 97 SC47 96 SC46 95 SC45 94 SC44 93 SC43 92 SC42 91 SC41 90 SC40 89 SC39 88 SC38 87 SC37 86 SC36 85 SC35 84 SC34 83 SC33 82 SC32 81 SC31 80 SC30
SC52 SC53 SC54 SC55 SC56 SC57 SC58 SC59 SC60 SC61 SC62 SC63 SC64 SC65 SC66 SC67 SC68 SC69 SC70 SC71 SC72 SC73 SC74 SC75 SC76 SC77 SC78 SC79 SC80
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Y
(0, 0)
X
Chip size: 4530 x 4390 Pad size: 98 x 98 Unit: m
S6B0086
79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
SC29 SC28 SC27 SC26 SC25 SC24 SC23 SC22 SC21 SC20 SC19 SC18 SC17 SC16 SC15 SC14 SC13 SC12 SC11 SC10 SC9 SC8 SC7 SC6 SC5 SC4 SC3 SC2 SC1
4
ERB 31 VEE 32 V5 33 V43 34 V12 35 V0 36 CS 37 M 38 DISPOFFB 39 VDD 40 SHL 41 VSS 42 D4_DR 43 D3_DM 44 D2_DL 45 D1_SID 46 CL2 47 AMS 48 CL1 49 ELB 50
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
PAD CENTER COORDINATES (S6B0086 / S6B0086TCP)
Pad No.
Pad Name
Coordinates X Y
Pad No.
Pad Name
Coordinates X Y
Pad No.
Pad Name
Coordinates X Y
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
SC51 SC52 SC53 SC54 SC55 SC56 SC57 SC58 SC59 SC60 SC61 SC62 SC63 SC64 SC65 SC66 SC67 SC68 SC69 SC70 SC71 SC72 SC73 SC74 SC75 SC76 SC77 SC78 SC79 SC80 ERB VEE V5 V43
-1690 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -2029 -1479 -1275 -1150 -1025
1959 1884 1750 1616 1482 1348 1214 1080 946 812 678 544 410 276 142 8 -126 -260 -394 -528 -662 -797 -931 -1065 -1199 -1333 -1467 -1601 -1735 -1884 -1959 -1959 -1959 -1959
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
V12 V0 VS M
DISP0FFB
-900 -775 -600 -475 -350 -225 -100 25 266 470 711 915 1040 1165 1290 1496 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029
-1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1959 -1884 -1735 -1601 -1467 -1333 -1199 -1065 -931 -797 -662 -528 -394 -260 -126 8 142 276 410
69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
SC19 SC20 SC21 SC22 SC23 SC24 SC25 SC26 SC27 SC28 SC29 SC30 SC31 SC32 SC33 SC34 SC35 SC36 SC37 SC38 SC39 SC40 SC41 SC42 SC43 SC44 SC45 SC46 SC47 SC48 SC49 SC50
2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 2029 1690 1529 1368 1207 1046 885 724 563 402 241 80 -80 -241 -402 -563 -724 -885 -1046 -1207 -1368 -1529
544 678 812 946 1080 1214 1348 1482 1616 1750 1884 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959 1959
VDD SHL VSS D4_DR D3_DM D2_DL D1_SID CL2 ELB CL1 ELB SC1 SC2 SC3 SC4 SC5 SC6 SC7 SC8 SC9 SC10 SC11 SC12 SC13 SC14 SC15 SC16 SC17 SC18
5
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
BLOCK DIAGRAM
SC1 SC2 SC3
SC78SC79SC80
V0 V12
80-bit 4-level Driver
V43 V5
VEE
80-bit Driver
M DISP0FFB
Output Level Selector
D1_SID
D2_DL LCK
80-bit Data Latch/ Common Data bi-directional shift register
D3_DM D4_DR
SCK
20 x 4-bit Segment Data bi-directional Shift Register
CL1 CL2
Data Latch Control Clock Control
ERB
CS AMS
Power Down Function
VDD VSS
ELB
6
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
BLOCK DESCRIPTION
Name Function Generates latch clock (LCK), shift clock (SCK) and control clock timing according to the input of CL1, CL2 and control inputs (CS, AMS). In common driver application mode, this block generates the shift clock (LCK) for the common data Bi-directional shift register. Determines the direction of segment data shift, and input data of each Bi-directional shift register. In 4-bit segment data parallel transfer mode, data is shifted by a 4-bit unit. In common driver application mode, data is transferred to the common data shift register directly, which disables this block. Controls the clock enable state of the current driver according to the input value of enable pin (ELB or ERB). If enable input value is "Low", every clock of the current driver is enabled and the clock control block works. But if enable input is "High", current driver is disabled and the input data value has no effect on the output level. So power consumption can be lowered. Controls the output voltage level according to the input control pin (M and DISPOFFB) (refer to PIN DESCRIPTION). Stores output data value by shifting the input values. In 1-bit serial interface mode application, all 80 shift clocks (SCK) are needed to store all the display data. But in 4-bit parallel transfer mode application, only 20 clocks are needed. In common driver application mode, this block does not work. In segment driver application mode, the data from the 20x4-bit segment data shift register are latched for segment driver output. In single-type common driver application,1-bit input data (from DL or DR pin) is shifted and latched by the direction according to the SHL signal input. In dual-type common application mode, 80-bit registers are divided by two blocks and controlled independently (refer to NOTE 3). Voltage level shifter block for high voltage part. The inputs of this block are of logical voltage level and the outputs of this block are at high voltage level value. These values are input in to the driver. Selects the output voltage level according to M and latched data value. If the data value is "High" the driver output is at selected voltage level (V0 or V5), and in the reverse case the driver output value is at the non-selected level (V12 or V43). In segment driver application mode, non-selected output value is V2 or V3. and when in common driver application, this value becomes V1 or V4. COM / SEG
Clock control
COM / SEG
Data latch control
SEG
Power down function
SEG
Output level selector 20x4-bit segment data I-directional shift register 80-bit data latch / common data I-directional shift register 80-bit level shifter
COM / SEG
SEG
COM / SEG
SEG
80-bit 4-level driver
SEG
7
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
PIN DESCRIPTION
Pin
VDD VSS VEE V0, V12, V43, V5 I LCD driver output voltage level LCD driver output Power supply
I/O
Name
Function
Logical "High" input port (+5V 10%, +3V 10%) 0V (GND) Logical "Low" for high voltage part Bias supply voltage input to drive the LCD. Bias voltage divided by the resistance is usually used as a supply voltage source (refer to NOTE 2). Display data output pin which corresponds to the respective latch contents. One of V0, V12, V34 and V5 is selected as a display driving voltage source according to the combination of the latched data level and M signal (refer to NOTE 1). Clock pulse input for the bi-directional shift register. - In segment driver application mode, the data is shifted to 20 x 4-bit segment data shift
Interface
Power
Power
SC1 - SC80
O
LCD
CL2
I
Data shift clock
The clock pulse, which was input when the enable bit (ELB/ERB) is in not active condition, is invalid. - In common driver application mode, the data is shifted to 80-bit common data bi-directional shift register by the CL1 clock. Hence, this clock pin is not used (Open or connect this pin to VDD).
Controller
M
I
AC signal for LCD driver output
Alternate signal input pin for LCD driving. Normal frame inversion signal is input in to this pin. - In segment driver application mode, this signal is used for latching the shift register contents at the falling edge of this clock pulse. CL1 pulse "High" level initializes power-down function block. - In common driver application mode, CL1 is used as a shifting clock of common output data. Control input pin to fix the driver output (SC1~SC80) to V0 level, during "Low" value input. LCD becomes non-selected by V0 level output from every output of segment drivers and every output of common drivers. When CS = "Low", S6B0086 is used as an 80-bit segment driver. When CS = "High", S6B0086 is set to an 80-bit common driver
Controller
CL1
I
Data latch clock
Controller
DISPOFFB
I
Display OFF control COM / SEG mode control
Controller
CS
I
VDD / VSS
8
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
According to the input value of the AMS and the CS pin, application mode of S6B0086 is differs as shown below. CS 0 0 1 1 AMS 0 1 0 1 Application mode 4-bit parallel interface mode 1-bit serial interface mode Single type application mode Dual type application mode COM/SEG
VDD / VSS
AMS
I
Application mode select
COM
PIN DESCRIPTION (CONTINUED)
Pin I/O Name Function In segment driver application mode, these pins are used as 4-bit data input pin (when 4-bit parallel interface mode : AMS = "Low"), or D1_SID is used as serial data input pin and other pins are not used (connect these to VDD) (when 1-bit serial interface mode : AMS = "High"). - In common driver application mode, the data is shifted from D2_DL(D4_DR) to D4_DR(D2_DL), when in single type interface mode (AMS = "Low"). In dualtype application case, the data are shifted from D2_DL and D3_DM (D4_DR and D3_DM) to D4_DR(D2_DL). In each case the direction of the data shift and the connection of data pins are determined by SHL input (refer to NOTE 3, NOTE 4). When SHL = "Low", data is shifted from left to right. When SHL = "High", the direction is reversed. (refer to NOTE3) - In segment driver application mode, the internal operation is enabled only when enable input (ELB or ERB) is "Low" (power down function). When several drivers are serially connected, the enable state of each driver is shifted according to the SHL input. Connect these pins as below. Segment Driver L H ELB Output (open) Input (VSS) ERB Input (VSS) Output (open)
VDD/VSS Controller
Interface
D1_SID, D2_DL, D3_DM, D4_DR
I/O
Display data input / serial input data / left, right data input output
SHL
Input
Shift direction control
ELB, ERB
I/O
Enable data input/output
In common driver application mode, power down function is not used.
Open these pins.
9
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
NOTE 1. Output Level Control M L L H H X Latched data L H L H X DISPOFFB H H H H L Output level (SC1 - SC80) SEG Mode V12 (V2) V0 V43 (V3) V5 V0 COM Mode V12 (V1) V5 V43 (V4) V0 V0
10
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
NOTE 2. LCD Driving Voltage Application Circuit (1) Segment driver application (CS = "Low") VDD VDD C R R (n-4)R R R V0 V1 V2 V3 V4 V5 to COM Driver V5 VSS to COM Driver V12 V43 V0, V5 V2, V3 Selection Level Non-selection Level S6B0086 V0 SEG1SEG80 to LCD Panel
VEE
* n = 9 (when 1/64 duty) to 17 (when 1/256 duty)
(2) Common driver application (CS = "High")
VDD VDD C R R (n-4)R R R V0 V1 V2 V3 V4 V5 to SEG Driver V43 V5 VSS V0 V12 S6B0086 VDD COM1COM80 to LCD Panel
V0, V5 V1, V4
Selection Level Non-selection Level
VEE
* n = 9 (when 1/64 duty) to 17 (when 1/256 duty)
11
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
NOTE 3. Data Shift Direction according to Control Signals (1) When CS = "Low" (segment driver application)
AMS
SHL
Application mode
SSSS CCCC 1234 DDDD 1234
Data Direction
S C 7 3 S C 7 4 S C 7 5 S C 7 6 S C 7 7 S C 7 8 S C 7 9 S C 8 0
Input Pin
L
D1 D2 D3 D4
DDDDDDDD 12341234
Shift Direction last data first data
L
4-Bit Parallel Data Transfer Mode (SEG)
SSSS CCCC 1234 DDDD 4321
S C 7 3
S C 7 4
S C 7 5
S C 7 6
S C 7 7
S C 7 8
S C 7 9
S C 8 0
D1_SID, D2_DL, D3_DM D4_DR
H
DDDDDDDD 43214321
Shift Direction first data
D1 D2 D3 D4
last data
SSSS CCCC 1234
L 1-Bit Serial Data Transfer Mode (SEG) H
S C 7 3
S C 7 4
S C 7 5
S C 7 6
S C 7 7
S C 7 8
S C 7 9
S C 8 0
Shift Direction Last data (D1_SID) first data
H
D1_SID
SSSS CCCC 1234 S C 7 3 S C 7 4 S C 7 5 S C 7 6 S C 7 7 S C 7 8 S C 7 9 S C 8 0
Shift Direction first data
Last data
12
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
(2) When CS = "High" (common driver application)
AMS
SHL
Application mode
Data Direction
Shift Direction S C 3 8 S C 3 9 S C 4 0 S C 4 1 S C 4 2 S C 4 3 S C 7 8 S C 7 9 S C 8 0
Input Pin
L
SSS CCC 123
D2_DL
L
Single-type Application Mode (COM)
Input Data (D2_DL)
Output Data (D4_DR)
Shift Direction SSS CCC 123 S C 3 8 S C 3 9 S C 4 0 S C 4 1 S C 4 2 S C 4 3 S C 7 8 S C 7 9 S C 8 0
H
D4_DR
Output Data (D2_DL)
Input Data (D2_DR)
Shift Direction S C 3 8 S C 3 9 S C 4 0 S C 4 1 S C 4 2 S C 4 3 S C 7 8 S C 7 9 S C 8 0
L
SSS CCC 123
D2_DL, D3_DM
H
Dual-type Application Mode (COM)
Input Data 1 (D2_DL)
Input Data 2 (D3_DM)
Output Data (D4_DR)
Shift Direction SSS CCC 123 S C 3 8 S C 3 9 S C 4 0 S C 4 1 S C 4 2 S C 4 3 S C 7 8 S C 7 9 S C 8 0
H
D4_DR, D3_DM
Output Data (D2_DL)
Input Data 2 (D3_DM)
Input Data 1 (D4_DR)
13
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
NOTE 4. Usage of Data Pins COM / SEG (CS pin) SEG (CS ="Low") Application mode (AMS pin) 4-bit parallel interface mode (AMS = "Low") 1-bit serial interface mode (AMS = "High") single-type application mode (AMS = "Low") dual-type application mode (AMS = "High") SHL X X L H L open H DL (output2) Data interface pin D1_SID D1 (input) SID (input) open DL (input) DL (output) DL (input1) D2_DL D2 (input2) D3_DM D3 (input3) Connect to VDD Open DM (input2) DM (input2) DR (output) DR (input) DR (output2) DR (input1) D4_DR D4 (input4)
COM (CS = "High")
MAXIMUM ABSOLUTE LIMIT
Characteristic Power supply voltage Driver supply voltage Input voltage Operating temperature Storage temperature Symbol VDD
VLCD VIN
Value -0.3 - +7.0 0 - +30 -0.3 - VDD + 0.3 -30 - +85 -55 - +150
Unit V
Topr Tstg
C
* NOTE: Voltage greater than above may do damage to the circuit.
14
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS (1) Segment Driver Application Characteristic Operating Voltage1 Input voltage (1) Output voltage (2) Input leakage current 1 (1) Input leakage current 2 (3) On resistance (4) Symbol VDD VLCD VIH VIL VOH VOL IIL1 IIL2 RON ISTBY Supply current (5) IDD IEE Test Condition VIN = VDD - VEE IOH = -0.4mA IOL = 0.4mA VIN = VDD to VSS VIN = VDD to VEE ION = 100A f CL1 = 32kHz M = VSS f CL1 = 32kHz f M = 80Hz VSS pin VDD = 5V VDD = 3V VDD = 5V Min. 2.7 6 0.8VDD 0 VDD-0.4 -10 -25 (VSS = 0V, Ta = - 30 - +85C) Typ. Max. Unit 2 5.5 28 VDD 0.2VDD 0.4 10 V V
A
25 4 100 5 2 500 k
A
mA
A
NOTES: 1. Applied to CL1, CL2, ELB, ERB, D1_SID - D4_DR, SHL, DISPOFFB, M, CS, AMS pin 2. ELB, ERB pin 3. V0, V12, V43, V5 pin 4. VLCD = VDD - VEE, V0 = VDD = 5V, V5= VEE = -23 V V12 = VDD-2/n(VLCD), V43 = VEE+2/n(VLCD), n = 17 (1/256 duty, 1/17 bias) 5. V0 = VDD, V12 = 1.71V(VDD = 5V) or -0.06V (VDD = 3V), V43 = -19.71 V(VDD = 5V) or -19.94V (VDD = 3V), V5 = VEE = -23V, no-load condition (1/256 duty, 1/17 bias) 4-bit parallel interface mode ISTBY : VDD = 5V, fCL2 = 5.12MHz, SHL = VSS, DISPOFFB = VDD, M = VSS, display data pattern = 0000 IDD : VDD = 3V, fCL2 = 4MHz, display data pattern = 0101 VDD = 5 V, fCL2 = 5.12MHz, display data pattern = 0101 IEE : VDD = 5V, fCL2 = 5.12MHz, display data pattern = 0101, VEE pin
15
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
DC CHARACTERISTICS (CONTINUED) (2) Common Driver Application (VSS = 0V, Ta = - 30 - +85C) Characteristic Operating voltage Input voltage (1) Output voltage (3) Input leakage current 1 (1) Input leakage current 2 (2) Input leakage current 3 (4) On resistance(5) Symbol VDD VLCD VIH VIL VOH VOL IIL1 IIL2 IIL3 RON ISTBY Supply current (6) IDD IEE Test Condition VIN = VDD - VEE IOH = -0.4mA IOL = 0.4mA VIN = VDD to VSS VIN = 0V, VDD = 5V (PULL UP) VIN = VDD to VEE ION = 100A f CL1 = 32kHz f CL1 = 32kHz f M = 80Hz VSS pin VDD = 5V VDD = 3V VDD = 5V Min. 2.7 6 0.8VDD 0 VDD-0.4 -10 -50 -25 Typ. -125 2 Max. 5.5 28 VDD 0.2VDD 0.4 10 -250 25 4 100 200 120 150 k V V Unit
A
A
NOTES: 1. Applied to CL1, D2_DL (SHL = LOW), D4_DR (SHL = HIGH), SHL, DISPOFFB, M, CS, AMS pin 2. Pull-up input pins : CL2, D1_SID, D3_DM (AMS = HIGH), ELB (SHL = LOW), ERB (SHL = HIGH) 3. D2_DL (SHL = HIGH) , D4_DR (SHL = LOW) pin 4. V0, V12, V43, V5 pin 5. VLCD = VDD-VEE, V0 = VDD = 5V, V5 = VEE = -23V V12 = VDD-1/n(VLCD), V43 = VEE+1/n(VLCD), n = 17(1/256 duty, 1/17 bias) 6. V0 = VDD, V12 = 3.35V (VDD = 5V) or 1.47V (VDD = 3V), V43 = -21.35V (VDD = 5 V) or -21.47V (VDD = 3 V), V5 = VEE = -23 V, no-load condition (1/256 duty, 1/17 bias) single-type mode operation : AMS = VSS, SHL = VSS, DISPOFFB = VDD D1_SID = D3_DM = VDD, D4_DR = OPEN, ELB = ERB = OPEN, ISTBY : VDD = 5V, M = VSS, D2_DL = VSS IDD : fM = 80Hz, D2_DL = VDD VDD = 3 V, display data pattern = 10000000..., 01000000..., 00100000..., 00010000..., .. VDD = 5 V, display data pattern = 10000000..., 01000000..., 00100000..., 00010000..., .. IEE : fM = 80Hz, D2_DL = VDD VDD = 5V, current through VEE Pin, display data pattern = 10000000..., 01000000..., 00100000..., 00010000...
16
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
AC CHARACTERISTICS (1) Segment Driver Application (VSS = 0V, Ta = - 30 - +85C) Characteristic Clock cycle time Clock pulse width Clock rise / fall time Data set-up time Data hold time Clock set-up time Clock hold time Propagation delay time ELB,ERB set-up time DISPOFFB low pulse width DISPOFFB clear time M - OUT propagation delay time CL1 - OUT propagation delay time DISPOFFB - OUT propagation delay time Symbol tCY tWCK tR/tF tDS tDH tCS tCH tPHL tPSU tWDL tCD tPD1 tPD2 tPD3 CL = 15pF Test Condition Duty = 50% ELB Output ERB Output ELB Input ERB Input (1) VDD = 5V 10% Min. 125 45 30 30 80 80 30 30 1.2 100 Typ. Max. 60 60 1.0 1.0 1.0 (2) VDD = 3V 10% Min. 250 95 65 65 120 120 65 65 1.2 100 Typ. 1.2 1.2 Max. 30 125 125 ns Unit
s
ns
s
17
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
AC CHARACTERISTICS (CONTINUED) (2) Common Driver Application (VSS = 0V, Ta = - 30 - +85C) Characteristic Clock cycle time Clock pulse width Clock rise / fall time Data set-up time Data hold time DISPOFFB low pulse width DISPOFFB clear time Output delay time M - OUT propagation delay time CL1 - OUT propagation delay time DISPOFFB - OUT propagation delay time Symbol tCY tWCK tR/tF tDS tDH tWDL tCD tDL tPD1 tPD2 tPD3 CL = 15pF Test Condition Duty = 50% (1) VDD = 5 V 10% Min. 250 45 30 30 1.2 100 Typ. Max. 50 200 1.0 1.0 1.0 (2) VDD = 3V 10% Min. 500 95 65 65 1.2 100 Typ. Max. 50 250 1.2 1.2 1.2 ns Unit
s
ns
s
18
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
AC CHARACTERISTICS (CONTINUED) (3) Segment Driver Application Timing
CL1
0.8VDD 0.2VDD
tWCK tCS tWCK
0.2VDD
0.8VDD 0.2VDD
tCH
0.8VDD 0.2VDD
CL2
0.8VDD 0.2VDD
0.8VDD
tWCK tR tF tCY
tDS
tDH
0.8VDD 0.2VDD
D1_SID - D4_DR
tWDL tCD
DISP0FFB
CL1 1 CL2 ELB, ERB (Output 1) ELB, ERB (Input 2) 2 3 19
0.2VDD
20
0.8VDD
tPHL
0.2VDD
tPSU
0.2VDD
M
0.8VDD 0.2VDD
tPD1
CL1
tPD2
0.2VDD 0.8VDD 0.2VDD
DISPOFFB
tPD3
SC1 - SC80 (Latched Data)
19
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
AC CHARACTERISTICS (CONTINUED) (4) Common Driver Application Timing
tCY
0.8VDD 0.2VDD
CL1
tDWCKH tF tDS tDH
0.8VDD 0.2VDD
0.8VDD 0.2VDD
tR
tF
(*1) DI
0.8VDD 0.2VDD
tDL
(*1) DO
tWDL tCD
0.8VDD
0.2VDD
DISP0FFB (*1) When in single-type interface mode DI => D2_DL (SHL = L), D4_DR (SHL = H) DO => D4_DR (SHL = L ), D2_DL (SHL = H) When in dual-type interface mode DI => D2_DL and D3_DM (SHL = L), D4_DR and D3_DM (SHL = H) DO => D4_DR (SHL = L), D2_DL (SHL = H)
M
0.8VDD 0.2VDD
tPD1
CL1
tPD2
0.2VDD 0.8VDD 0.2VDD
DISPOFFB
tPD3
SC1 - SC80 (Latched Data
20
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
POWER DOWN FUNCTION In the case of cascade connection of segment mode drivers, S6B0086 has a "power down function" In order to reduce the power consumption. SHL L H Enable input ERB ELB Enable output ELB ERB Current driver status While ERB ="Low", current driver is enabled. While ELB ="Low", current driver is enabled. The other drivers status Disabled Disabled
* In the case of common driver application, power down function does not work.
CL1
1 2 n-1 n 1 2 n-1 n 1 2 n-1 n 1 2 n-1 n 1 2 n-1
~ ~
~ ~
~ ~
~ ~
CL2 ~~ ~~ ~~ ~~ ~ ~ ~ ~ ~~ ~~ ~ ~ ~~ ~~ ~ ~ ~ ~ ELB1(input1) ERB1/ELB2 (Output1/Input2) ERB2/ELB3 (Output2/Input3) ERB3/ELB4 (Output3/Input4) ELB4 (Output4) ~ ~ ~ ~ ~ ~
~~ ~~
~ ~
~ ~
~ ~
~ ~
NOTES: 1. SHL = High (EBL = Input, ERB = Output) Current S6A0086's ERB must be connected to the next S6A0086's ELB. 2. When in 4-bit parallel interface mode: n = 20 When in 1-bit serial interface mode: n = 80
~ ~
~ ~
~ ~
~ ~
21
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
OPERATION TIMING DIAGRAM (1) 4-bit Parallel Mode Interface Segment Driver * When SHL = "Low"
19
CL2 D1_SID D2_DL D3_DM D4_DR ELB (Input) ERB (Output) CL1 SC5 SC6 SC7 SC8
20
1
2
3
19
20
1
2
SC1 SC2 SC3 SC4
SC77 SC78 SC79 SC80
SC73 SC74 SC75 SC76
SC69 SC70 SC71 SC72
SC5 SC6 SC7 SC8
SC1 SC2 SC3 SC4
SC77 SC78 SC79 SC80
SC73 SC74 SC75 SC76
SC1 - SC80
*
When SHL = "High"
19
CL2 D1_SID D2_DL D3_DM D4_DR ERB (Input) ELB (Output) CL1 SC76 SC75 SC74 SC73
20
1
2
3
19
20
1
2
SC80 SC79 SC78 SC77
SC4 SC3 SC2 SC1
SC8 SC7 SC6 SC5
SC12 SC11 SC10 SC9
SC76 SC75 SC74 SC73
SC80 SC79 SC78 SC77
SC4 SC3 SC2 SC1
SC8 SC7 SC6 SC5
SC1 - SC80
22
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
(2) 1-bit Serial Mode Interface Segment Driver * When SHL = "Low"
79
CL2 D1_SID ELB (Input) ERB (Output) CL1 SC2
80
1
2
3
79
80
1
2
SC1
SC80
SC79
SC78
SC2
SC1
SC80
SC79
SC1 - SC80
*
When SHL = "High"
79
CL2 D1_SID ERB (Input) ELB (Output) CL1 SC79
80
1
2
3
79
80
1
2
SC80
SC1
SC2
SC3
SC79
SC80
SC1
SC2
SC1 - SC80
23
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
(3) Single-type Interface Mode Common Driver * When SHL = "Low"
79
CL1 D2_DL D4_DR COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA79 COM_DATA80
80
1
2
79
80
1
2
Current Driver's COMMON area
*
When SHL = "High"
79
CL1 D4_DR D2_DL COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA79 COM_DATA80 Current Driver's COMMON area
80
1
2
79
80
1
2
24
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
(4) DUAL-type Interface Mode Common Driver * When SHL = "Low"
1 CL1 D2_DL D3_DM D4_DR COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA39 COM_DATA40 COM_DATA41 COM_DATA42 COM_DATA43 COM_DATA79 COM_DATA80 2 3 39 40 1 2 3 39 40
*
When SHL = "High"
1 CL1 D2_DL D3_DM D4_DR COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA39 COM_DATA40 COM_DATA41 COM_DATA42 COM_DATA43 COM_DATA79 COM_DATA80
2
3
39
40
1
2
3
39
40
25
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
(5) Common / Segment Driver Timing (1/200 DUTY)
199 CL1 Latched Data (SEG) M COM_DATA1 COM_DATA199 COM_DATA200
V0 V1 V4 V5 V0 V1
200
1
200
1
199
200
1
199
200
COM1
COM199
V4 V5 V0 V1
COM200
V4 V5
SEG_DATA1
V0 V1 V2
SEG1
V3 V4 V5
1 CL2 CL1 D1 - D4 Latched_Data M Enable Out
2
18
19
20
1
26
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
APPLICATION INFORMATION
1-bit Serial Interface Mode (80-Ch. Segment Driver) a) Lower View (SHL = L, AMS = H )
LCD PANEL
S1 S80 S81 S160 Sn Sn+80
SC80 ERB CS AMS
SC1 ELB
SC80 ERB CS AMS
SC1 ELB
SC80 ERB CS AMS SHL D1_SID
SC1 ELB
D2_DLSHL D1_SID D4_DR
D2_DLSHL D1_SID D4_DR
D2_DLD4_DR
1-bit serial data input
b) Upper View (SHL = H, AMS = H)
1-bit serial data input
D2_DLD4_DR ELB SC1
D1_SID
SHL AMS CS ERB SC80
D2_DLD4_DR
D1_SID
SHL AMS CS ERB SC80
D1_SID D2_DLD4_DR
SHL AMS CS ERB SC80
ELB SC1
ELB SC1
S1
S80
S81
S160
Sn
Sn+80
LCD PANEL
27
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
4-Bit Parallel Interface Mode (80 Ch. Segment Driver) a) Lower View (SHL = L, AMS = L )
LCD PANEL
S1 S80 S81 S160 Sn Sn+80
SC80 ERB CS AMS
SC1 ELB
SC80 ERB CS AMS
SC1 ELB
SC80 ERB CS AMS SHL
SC1 ELB
SHL D1_SID-D4_DR
SHL D1_SID-D4_DR
D1_SID-D4_DR
4-bit serial data input
4
4
4
b) Upper View (SHL = H, AMS = L)
4-bit serial data input
4 D1_SID-D4_DR
4 D1_SID-D4_DR
4 D1_SID-D4_DR
SHL CS
SHL AMS CS
SHL AMS CS ERB SC80
AMS ELB SC1 ERB SC80 ELB SC1
ERB SC80
ELB SC1
S1
S80
S81
S160
Sn
Sn+80
LCD PANEL
28
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
Single-type Interface Mode (80 Ch. Common Driver)
input data 1
D4_DR
SC80
C1
CS AMS SHL D2_DL SC1 C80
D4_DR
SC80
C81
LCD PANEL
CS AMS SHL D2_DL SC1 C160
D4_DR
SC1
C161
CS AMS SHL D2_DL SC1 C240
29
S6B0086
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
Dual-type Interface Mode (40 Ch. + 40 Ch. Common Driver)
input data 1
D4_DR
SC80
C1
CS AMS SHL D2_DL SC1 C80
D4_DR
SC80
C81
LCD PANEL (1/2)
CS AMS SHL D2_DL SC1 C160
input data 2
D3_DM
D4_DR
SC80 SC40 SC41
C161 C200 C201 C240
CS AMS SHL D2_DL
SC1
D4_DR
SC80
C241
CS AMS SHL D2_DL SC1 C320
LCD PANEL (2/2)
D4_DR
SC80
C321
CS AMS SHL D2_DL SC1 C400
NOTE: Using this application mode (dual-type common mode), the duty ratio can be reduced to half. In case, 1/200 duty can be used to drive the 400 common LCD panel.
30
80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0086
APPLICATION CIRCUIT EXAMPLE
VDD COM /SEG
R V1
4
4
4
4
4
4
COM
R V2
V0-V5 D1_SID - D4_DR SEG DISPOFFB M SEG ELB AMS COM CS SHL SC1 SC80 SEG - SEG80 S1 M DISPOFFB CS AMS SHL V0-V5 CL1 4 D2_DL D4_DR SC80
COM1 COM80
CL1 CL2 ERB
V0-V5 D1_SID - D4_DR CL1 DISPOFFB M ELB AMS CS SHL SC1 SC80 SEG - SEG80 S81 S160 CL2
(n-4)R
V3
S6B0086
S6B0086 ERB
V0-V5 D1_SID - D4_DR DISPOFFB CL1 M CL2 ELB S6B0086 ERB AMS CS SHL SC1 SC80 SEG - SEG80 S161 S240
R
V4
R
V5
COM /SEG
VSS
VEE
S80
C1
S6B0086
SC1
C80
M DISPOFFB CS AMS SHL V0-V5 CL1 4
D4_DR SC80
COM1 COM80
C81
240 x 240 LCD MODULE
S6B0086
SC1 D2_DL
C161
M DISPOFFB
D4_DR SC80
COM1 COM80
C161
Controller
DISPOFFB FRAME(M) COM_DATA D1 - D4 CL1 CL2 4 CS AMS SHL V0-V5 CL1 D2_DL
S6B0086
SC1
C240
31

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